The CLHS X protocol 25 Gbps IP Core is the same IP core that is found in all the 10 Gbps CLHS products on the market and has been available from the A3 since the original release of the CLHS specification in 2012. This proven core presents easy-to-use parallel interfaces for video, bidirectional trigger, camera commands, bidirectional GPIO, and the CLHS revision message. Performing all the priority encoding requirements listed in the CLHS specification, the core simplifies developing CLHS products. The associated PCS module does 64/66b encoding with forward error correction ensuring error-free transmissions and enabling the core to be used with FPGA transceivers that offer simple 64-to-1 serializers/deserializers. No other IP is needed.
CLHS specification 1.2 recently introduced the 25 Gbps speed along with the QSFP28, SFP28, and MPO connectors. The good news is that 25 Gbps optical engines are backward compatible to 10 Gbps optical engines where CLHS discovery occurs. CLHS uses a failsafe negotiating process to switch to 25 Gbps. Several developers have already developed 25 Gbps systems using proven 10 Gbps hardware to debug the 25 Gbps product. The committee has proof of concept to achieve 50 Gbps using the same IP core, ensuring an easy transition to future speeds.